1. Technical Field
Embodiments of the disclosure relate to semiconductor stack packages, and more particularly, to semiconductor stack packages including a plurality chips disposed side-by-side on a single plane.
2. Related Art
In the electronics industry, multi-functional or highly integrated semiconductor packages with compact sizes are increasingly in demand with the development of smaller and higher performance electronic systems. In response to such a demand, various package technologies for arraying or disposing many semiconductor chips in a single semiconductor package have been proposed to provide the multi-functional and highly integrated semiconductor packages. These multi-chip packages may be readily realized by designing at least one semiconductor chip in each package to be a multi-functional chip or by increasing a capacity of the at least one semiconductor chip in each package. Thus, the multi-chip packages may have the advantage of relatively short development period and low fabrication cost.
Since each of the multi-chip packages is fabricated by stacking semiconductor chips, the multi-chip packages may also be referred to as stack packages. The stack packages may be typically categorized as either vertical stack packages or horizontal stack packages according to a method of stacking the semiconductor chips. Each of the vertical stack packages may be realized by vertically stacking semiconductor chips on a package substrate, and each of the horizontal stack packages may be realized by arraying or disposing semiconductor chips side-by-side on a package substrate.